1. Field of the Invention
The invention relates to a method for producing a vertical field effect transistor.
2. Description of the Related Art
The field effect principle consists in influencing the current flow in a channel by means of the potential at a control electrode. The control electrode is also referred to as the gate. The field effect transistors for logic circuits are intended to have a short gate length, a thin gate dielectric and, at the same time, a large switch-on current. Moreover, the operating voltage is intended to be as small as possible in order to avoid excessively large leakage currents through the thin gate dielectric. Conventional planar field effect transistors cannot meet these requirements.
For example, the German patent specification DE 199 24 571 C2 discloses a double gate structure that enables a high switch-on current because two gates contribute to the current control. The operating voltage can be reduced for this reason. Dual or even triple gate structures are a promising approach for improving the electrical properties of a field effect transistor, particularly at ultrashort gate lengths, that is to say gate lengths of less than 100 nanometers.
However, multiple gate structures have drawbacks. For example multiple gate structures are three-dimensional structures, so that their production is difficult and must be carefully optimized. Despite the small dimensions, the area requirement of chip area per transistor is also still intended to be as small as possible. Moreover, the transistors are intended to have electrical properties like silicon on insulator (SOI) wafers.
Accordingly, there exists a need for a field effect transistor that avoids excessively large leakage currents through the thin gate dielectric in a small package.